苯的硝化浓硫酸作用:紧急求助VHDL程序

A simple state machine can do. (of course the details will depends on your input/output specification)

case state is
when "000" =>
detected <= '0';
if D='1' then -- Detect first bit 1
state <= state + 1;
else
state <= state;
end if;
when "001" =>
if D='1' then -- Second bit 1
state <= state + 1;
else
state <= "000";
end if;
when "010" =>
if D='1' then -- Third bit 1
state <= state + 1;
else
state <= "000";
end if;
when "011" =>
if D='0' then -- Fourth bit 0
state <= state + 1;
else
state <= "000";
end if;
when "100" =>
if D='0' then -- Fifth bit 0
state <= state + 1;
else
state <= "000";
end if;
when "101" =>
-- 11100 detected,
detected <='1';
-- whatever you need to do here
end case;

Here, you initialize state to "000", D is the input bit that is changing every clock.